diff options
| author | Maayan Kashani <mkashani@nvidia.com> | 2024-07-24 10:36:16 +0300 |
|---|---|---|
| committer | Thomas Monjalon <thomas@monjalon.net> | 2024-07-29 22:51:57 +0200 |
| commit | 88596e96f0efbe1bde4eeeb1cc196fd0d8627885 (patch) | |
| tree | 76c5855b9b9433ab71f22b9706a5ec32fdf3debc | |
| parent | 57cf5b6d7df87864274750d21b5e7e440d11467e (diff) | |
doc: describe mlx5 HWS actions order
Add actions order supported in mlx5 PMD
when HW steering flow engine is used.
This limitation existed since HW Steering flow engine was introduced.
Fixes: 22681deead3e ("net/mlx5/hws: enable hardware steering")
Cc: stable@dpdk.org
Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
| -rw-r--r-- | doc/guides/nics/mlx5.rst | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 43fc181d8d..1dccdaad50 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -251,6 +251,26 @@ Limitations IPv6 routing extension matching is not supported in flow template relaxed matching mode (see ``struct rte_flow_pattern_template_attr::relaxed_matching``). + - The supported actions order is as below:: + + MARK (a) + *_DECAP (b) + OF_POP_VLAN + COUNT | AGE + METER_MARK | CONNTRACK + OF_PUSH_VLAN + MODIFY_FIELD + *_ENCAP (c) + JUMP | DROP | RSS (a) | QUEUE (a) | REPRESENTED_PORT (d) + + a. Only supported on ingress. + b. Any decapsulation action, including the combination of RAW_ENCAP and RAW_DECAP actions + which results in L3 decapsulation. + Not supported on egress. + c. Any encapsulation action, including the combination of RAW_ENCAP and RAW_DECAP actions + which results in L3 encap. + d. Only in transfer (switchdev) mode. + - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any specific VLAN will match for VLAN packets as well: |