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authorLinus Torvalds <torvalds@linux-foundation.org>2020-06-04 20:02:14 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2020-06-04 20:02:14 -0700
commit9d71d3cd9ef040c284506648285915e9ba4d08c4 (patch)
tree3baeb9955b01b1d5145389a6976ed6b69ded096f /arch/arm64/boot/dts/qcom/sdm845-db845c.dts
parent828f3e18e1cb98c68fc6db4d5113513d4a267775 (diff)
parent9ad249abe7b8f6f0d2d876bde860b1c511d71d7b (diff)
Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann: "This is the set of device tree changes, mostly covering new hardware support, with 577 patches touching a little over 500 files. There are five new Arm SoCs supported in this release, all of them for existing SoC families: - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS devices and Android Set-top-box designs, along with the "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4 single-board computer. - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and the iW-RainboW-G21D-Qseven-RZG1H board/SoM - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO Advance game console Newly added machines on already supported SoCs are: - AMLogic S905D based Smartlabs SML-5442TW TV box - AMLogic S905X3 based ODROID-C4 SBC - AMLogic S922XH based Beelink GT-King Pro TV box - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO OpenPower P9 "Nicole" - Marvell Kirkwood based Check Point L-50 router - Mediatek MT8173 based Elm/Hana Chromebook laptops - Microchip SAMA5D2 "Industrial Connectivity Platform" reference board - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit - Octavo OSDMP15x based Linux Automation MC-1 development board - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone - Realtek RTD1295 based Xnano X5 TV Box - STMicroelectronics STM32MP1 based Stinger96 single-board computer and IoT Box - Samsung Exynos4210 based based Samsung Galaxy S2 phone - Socionext Uniphier based Akebi96 SBC - TI Keystone based K2G Evaluation board - TI am5729 based Beaglebone-AI development board Include device descriptions for additional hardware support in existing SoCs and machines based on all major SoC platforms: - AMlogic Meson - Allwinner sunxi - Arm Juno/VFP/Vexpress/Integrator - Broadcom bcm283x/bcm2711 - Hisilicon hi6220 - Marvell EBU - Mediatek MT27xx, MT76xx, MT81xx and MT67xx - Microchip SAMA5D2 - NXP i.MX6/i.MX7/i.MX8 and Layerscape - Nvidia Tegra - Qualcomm Snapdragon - Renesas r8a77961, r8a7791 - Rockchips RK32xx/RK33xx - ST-Ericsson ux500 - STMicroelectronics SMT32 - Samsung Exynos and S5PV210 - Socionext Uniphier - TI OMAP5/DRA7 and Keystone" * tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits) ARM: dts: keystone: Rename "msmram" node to "sram" arm: dts: mt2712: add uart APDMA to device tree arm64: dts: mt8183: add mmc node arm64: dts: mt2712: add ethernet device node arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 ARM: dts: mmp3: Add the fifth SD HCI ARM: dts: berlin*: Fix up the SDHCI node names ARM: dts: mmp3: Fix USB & USB PHY node names ARM: dts: mmp3: Fix L2 cache controller node name ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa910: Fix the gpio interrupt cell number ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property ARM: dts: pxa168: Fix the gpio interrupt cell number ARM: dts: pxa168: Add missing address/size cells to i2c nodes ARM: dts: dove: Fix interrupt controller node name ARM: dts: kirkwood: Fix interrupt controller node name arm64: dts: Add SC9863A emmc and sd card nodes arm64: dts: Add SC9863A clock nodes arm64: dts: mt6358: add PMIC MT6358 related nodes ...
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845-db845c.dts')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-db845c.dts210
1 files changed, 210 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 21fd6f8d5799..c00797bd3b07 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -112,6 +112,40 @@
// enable-active-high;
};
+ cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM0_DVDD_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ enable-active-high;
+ gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
+ vin-supply = <&vbat>;
+ };
+
+ cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM0_AVDD_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ enable-active-high;
+ gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_avdd_2v8_en_default>;
+ vin-supply = <&vbat>;
+ };
+
+ /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
+ cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM3_AVDD_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ vin-supply = <&vbat>;
+ };
+
pcie0_3p3v_dual: vldo-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VLDO_3V3";
@@ -412,6 +446,52 @@
};
&pm8998_gpio {
+ gpio-line-names =
+ "NC",
+ "NC",
+ "WLAN_SW_CTRL",
+ "NC",
+ "PM_GPIO5_BLUE_BT_LED",
+ "VOL_UP_N",
+ "NC",
+ "ADC_IN1",
+ "PM_GPIO9_YEL_WIFI_LED",
+ "CAM0_AVDD_EN",
+ "NC",
+ "CAM0_DVDD_EN",
+ "PM_GPIO13_GREEN_U4_LED",
+ "DIV_CLK2",
+ "NC",
+ "NC",
+ "NC",
+ "SMB_STAT",
+ "NC",
+ "NC",
+ "ADC_IN2",
+ "OPTION1",
+ "WCSS_PWR_REQ",
+ "PM845_GPIO24",
+ "OPTION2",
+ "PM845_SLB";
+
+ cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
+ pins = "gpio12";
+ function = "normal";
+
+ bias-pull-up;
+ drive-push-pull;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+
+ cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
+ pins = "gpio10";
+ function = "normal";
+
+ bias-pull-up;
+ drive-push-pull;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+
vol_up_pin_a: vol-up-active {
pins = "gpio6";
function = "normal";
@@ -570,6 +650,42 @@
};
&tlmm {
+ cam0_default: cam0_default {
+ rst {
+ pins = "gpio9";
+ function = "gpio";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ mclk0 {
+ pins = "gpio13";
+ function = "cam_mclk";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ cam3_default: cam3_default {
+ rst {
+ function = "gpio";
+ pins = "gpio21";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ mclk3 {
+ function = "cam_mclk";
+ pins = "gpio16";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
pcie0_default_state: pcie0-default {
clkreq {
pins = "gpio36";
@@ -863,3 +979,97 @@
bias-pull-up;
};
};
+
+&pm8998_gpio {
+
+};
+
+&cci {
+ status = "ok";
+};
+
+&cci_i2c0 {
+ camera@10 {
+ compatible = "ovti,ov8856";
+ reg = <0x10>;
+
+ // CAM0_RST_N
+ reset-gpios = <&tlmm 9 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_default>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 9 0>;
+
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "xvclk";
+ clock-frequency = <19200000>;
+
+ /* The &vreg_s4a_1p8 trace is powered on as a,
+ * so it is represented by a fixed regulator.
+ *
+ * The 2.8V vdda-supply and 1.2V vddd-supply regulators
+ * both have to be enabled through the power management
+ * gpios.
+ */
+ power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+ dovdd-supply = <&vreg_lvs1a_1p8>;
+ avdd-supply = <&cam0_avdd_2v8>;
+ dvdd-supply = <&cam0_dvdd_1v2>;
+
+ status = "disable";
+
+ port {
+ ov8856_ep: endpoint {
+ clock-lanes = <1>;
+ link-frequencies = /bits/ 64
+ <360000000 180000000>;
+ data-lanes = <1 2 3 4>;
+// remote-endpoint = <&csiphy0_ep>;
+ };
+ };
+ };
+};
+
+&cci_i2c1 {
+ camera@60 {
+ compatible = "ovti,ov7251";
+
+ // I2C address as per ov7251.txt linux documentation
+ reg = <0x60>;
+
+ // CAM3_RST_N
+ enable-gpios = <&tlmm 21 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam3_default>;
+ gpios = <&tlmm 16 0>,
+ <&tlmm 21 0>;
+
+ clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+ clock-names = "xclk";
+ clock-frequency = <24000000>;
+
+ /* The &vreg_s4a_1p8 trace always powered on.
+ *
+ * The 2.8V vdda-supply regulator is enabled when the
+ * vreg_s4a_1p8 trace is pulled high.
+ * It too is represented by a fixed regulator.
+ *
+ * No 1.2V vddd-supply regulator is used.
+ */
+ power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+ vdddo-supply = <&vreg_lvs1a_1p8>;
+ vdda-supply = <&cam3_avdd_2v8>;
+
+ status = "disable";
+
+ port {
+ ov7251_ep: endpoint {
+ clock-lanes = <1>;
+ data-lanes = <0 1>;
+// remote-endpoint = <&csiphy3_ep>;
+ };
+ };
+ };
+};