diff options
| author | Vasant Hegde <vasant.hegde@amd.com> | 2024-04-18 10:33:53 +0000 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2024-04-26 12:16:00 +0200 |
| commit | 25efbb055863079bbd47b32fc6d3c4a6f082daf1 (patch) | |
| tree | 6f740cd6307b1c13e7cd565befa03b4bd86f58e8 /drivers/iommu/amd/amd_iommu.h | |
| parent | c9e8701132e6cc162d082e7dad8a2e9110f5f8fd (diff) | |
iommu/amd: Enable PCI features based on attached domain capability
Commit eda8c2860ab6 ("iommu/amd: Enable device ATS/PASID/PRI capabilities
independently") changed the way it enables device capability while
attaching devices. I missed to account the attached domain capability.
Meaning if domain is not capable of handling PASID/PRI (ex: paging
domain with v1 page table) then enabling device feature is not required.
This patch enables PASID/PRI only if domain is capable of handling SVA.
Also move pci feature enablement to do_attach() function so that we make
SVA capability in one place. Finally make PRI enable/disable functions as
static functions.
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240418103400.6229-9-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd/amd_iommu.h')
| -rw-r--r-- | drivers/iommu/amd/amd_iommu.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 159e9a43aa61..f8919c54d9ae 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -46,10 +46,6 @@ extern int amd_iommu_gpt_level; bool amd_iommu_pasid_supported(void); -/* Device capabilities */ -int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev); -void amd_iommu_pdev_disable_cap_pri(struct pci_dev *pdev); - /* GCR3 setup */ int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid, unsigned long gcr3); |