diff options
| author | Danielle Ratson <danieller@nvidia.com> | 2022-07-27 09:23:23 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-07-29 11:02:23 +0100 |
| commit | bbd300570a9e8628a6e2b644f1dbda1ae7e0effe (patch) | |
| tree | f35b983322e1b751413ee05b751c257335feccce /drivers/net/ethernet/mellanox/mlxsw/core.h | |
| parent | d25ff63a181b6943d94797c350de332cffadfab2 (diff) | |
mlxsw: Query UTC sec and nsec PCI offsets and values
Query UTC sec and nsec PCI offsets during the pci_init(), to be able to
read UTC time later.
Implement functions to read UTC seconds and nanoseconds from the offset
which was read as part of initialization.
Signed-off-by: Danielle Ratson <danieller@nvidia.com>
Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/core.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/core.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h index 6c332bb9b6eb..cfc365b65c1c 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core.h +++ b/drivers/net/ethernet/mellanox/mlxsw/core.h @@ -438,6 +438,9 @@ int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core); u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core); +u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core); +u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core); + bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core); void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core); @@ -479,6 +482,8 @@ struct mlxsw_bus { u8 *p_status); u32 (*read_frc_h)(void *bus_priv); u32 (*read_frc_l)(void *bus_priv); + u32 (*read_utc_sec)(void *bus_priv); + u32 (*read_utc_nsec)(void *bus_priv); u8 features; }; |