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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-evk.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-evk.dts14
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 3da1fff3d6fd..ad66f1286d95 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -124,8 +124,6 @@
};
&iomuxc {
- pinctrl-names = "default";
-
pinctrl_fec: fecgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
@@ -159,7 +157,7 @@
>;
};
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
>;
@@ -184,7 +182,7 @@
>;
};
- pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
@@ -196,7 +194,7 @@
>;
};
- pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
@@ -208,7 +206,7 @@
>;
};
- pinctrl_usdhc2_gpio: usdhc2grp-gpio {
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
>;
@@ -230,7 +228,7 @@
>;
};
- pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
@@ -246,7 +244,7 @@
>;
};
- pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6