summaryrefslogtreecommitdiff
path: root/target/openrisc
AgeCommit message (Expand)Author
2023-08-31target/translate: Remove unnecessary 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé
2023-08-24target/openrisc: Use tcg_gen_negsetcond_*Richard Henderson
2023-07-31target/openrisc: Set EPCR to next PC on FPE exceptionsStafford Horne
2023-07-25other architectures: spelling fixesMichael Tokarev
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson
2023-06-05tcg: Add insn_start_words to TCGContextRichard Henderson
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson
2023-06-05*: Add missing includes of tcg/tcg.hRichard Henderson
2023-05-11target/openrisc: Setup FPU for detecting tininess before roundingStafford Horne
2023-05-11target/openrisc: Set PC to cpu state on FPU exceptionStafford Horne
2023-05-11target/openrisc: Allow fpcsr access in user modeStafford Horne
2023-03-13target/openrisc: Remove `NB_MMU_MODES` defineAnton Johansson
2023-03-07gdbstub: move register helpers into standalone includeAlex Bennée
2023-03-05target/openrisc: Drop tcg_temp_freeRichard Henderson
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson
2023-03-01target/openrisc: Replace `tb_pc()` with `tb->pc`Anton Johansson
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé
2022-12-16target/openrisc: Convert to 3-phase resetPeter Maydell
2022-11-01accel/tcg: Remove will_exit argument from cpu_restore_stateRichard Henderson
2022-11-01target/openrisc: Use cpu_unwind_state_data for mfsprRichard Henderson
2022-11-01target/openrisc: Always exit after mtspr npcRichard Henderson
2022-10-26target/openrisc: Convert to tcg_ops restore_state_to_opcRichard Henderson
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson
2022-09-04target/openrisc: Interrupt handling fixesStafford Horne
2022-09-04target/openrisc: Enable MTTCGStafford Horne
2022-09-04target/openrisc: Add interrupted CPU to logStafford Horne
2022-09-04target/openrisc: Fix memory reading in debuggerStafford Horne
2022-05-15Merge tag 'or1k-pull-request-20220515' of https://github.com/stffrdhrn/qemu i...Richard Henderson
2022-05-15target/openrisc: Do not reset delay slot flag on early tb exitStafford Horne
2022-05-11Normalize header guard symbol definitionMarkus Armbruster
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé
2022-02-21exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé
2022-01-28Remove unnecessary minimum_version_id_old fieldsPeter Maydell
2021-11-02target/openrisc: Make openrisc_cpu_tlb_fill sysemu onlyRichard Henderson
2021-10-15target/openrisc: Drop checks for singlestep_enabledRichard Henderson
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-14target/openrisc: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson
2021-07-13target/openrisc: Use dc->zero in gen_add, gen_addcRichard Henderson
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-10-23 09:37:07 +0000