diff options
author | bors <bors@rust-lang.org> | 2024-09-30 23:23:40 +0000 |
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committer | bors <bors@rust-lang.org> | 2024-09-30 23:23:40 +0000 |
commit | c87004a1f5be671e3f03f69fb13d8915bdbb6a52 (patch) | |
tree | 2d86795a8614bdfb1d64a2f3281d61669dad0d5a /compiler/rustc_codegen_llvm/src/llvm_util.rs | |
parent | fb4aebddd18d258046ddb51fd41589295259a0fa (diff) | |
parent | a0637597b4fd169118bc794363474ef4d5d06e1d (diff) |
Auto merge of #131078 - tgross35:rollup-66to2u9, r=tgross35
Rollup of 5 pull requests
Successful merges:
- #129638 (Hook up std::net to wasi-libc on wasm32-wasip2 target)
- #130877 (rustc_target: Add RISC-V atomic-related features)
- #130914 (Mark some more types as having insignificant dtor)
- #130961 (Enable `f16` tests on x86 Apple platforms)
- #130966 (make ptr metadata functions callable from stable const fn)
r? `@ghost`
`@rustbot` modify labels: rollup
Diffstat (limited to 'compiler/rustc_codegen_llvm/src/llvm_util.rs')
-rw-r--r-- | compiler/rustc_codegen_llvm/src/llvm_util.rs | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs index 201cfbb1918..bd847cd0068 100644 --- a/compiler/rustc_codegen_llvm/src/llvm_util.rs +++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs @@ -264,6 +264,10 @@ pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option<LLVMFea ("riscv32" | "riscv64", "unaligned-scalar-mem") if get_version().0 == 18 => { Some(LLVMFeature::new("fast-unaligned-access")) } + // Filter out features that are not supported by the current LLVM version + ("riscv32" | "riscv64", "zaamo") if get_version().0 < 19 => None, + ("riscv32" | "riscv64", "zabha") if get_version().0 < 19 => None, + ("riscv32" | "riscv64", "zalrsc") if get_version().0 < 19 => None, // Enable the evex512 target feature if an avx512 target feature is enabled. ("x86", s) if s.starts_with("avx512") => { Some(LLVMFeature::with_dependency(s, TargetFeatureFoldStrength::EnableOnly("evex512"))) |